EC Fundamentals - Digital Electronics
EC basics
A firmware engineer, in addition to software coding skills, also needs basic hardware knowledge. This is because firmware engineers often collaborate with hardware engineers to troubleshoot and resolve problems; therefore, hardware knowledge is one of the essential skills for a firmware engineer. This article will introduce commonly used digital logic concepts as a starting point to build a solid foundation for firmware engineers.
Digital Electronics
It is said that the two polarities of the Eight Trigrams in China are Taiyin and Taiyang (binary system), and the eight trigrams (octal system) are used by the Chinese to continue the wisdom of their ancestors in feng shui, fortune telling, governance, martial arts, and other fields. Westerners have applied it to calculation and storage functions, calling it digital electronics.
Glossary
Odd Parity– Adding one bit to a set of digits will result in an odd number of 1s in the set.。
Even parity– Adding one bit to a set of digits will give the set an even number of 1s.。
N-type semiconductor– Adding pentavalent components to intrinsic semiconductors。
P-type semiconductor– Adding trivalent components to intrinsic semiconductors。
PN interface- N-type conductors lose electrons to produce positively charged ions, while P-type semiconductors gain electrons to produce negatively charged ions.。
Push-Pull outputTwo transistors are connected symmetrically and work together, with one transistor active while the other is idle. This reduces second harmonic distortion and is highly efficient.。
Logic gate
Logic gates are the most basic components in digital circuit design. Therefore, this chapter begins with the basic characteristics of logic, and then introduces various basic logic gates and their applications in actual circuits.
Electrical characteristics
Logic gates are mainly composed of TTL (Transistor-Tramsistor Logic) or MOS (Metal-Oxide Semiconductor Logic) components. Different component combinations result in different electrical characteristics of the logic gate. See the table below.
NMOS
The source and drain of two N-type silicon transistors are first fabricated on a P-type substrate, then a layer of silicon dioxide is added for insulation, and a metal electrode is added above the channel between the source and drain as the gate. In an enhanced N-MOS transistor, a positive voltage applied to the drain attracts electrons to the source. Since electrons cannot pass through the P-type channel, no current is generated. However, when a positive voltage is applied to the gate, the gate's electric field attracts electrons in the channel, creating an electron layer on top of the channel, and thus electrons flow from the source to the drain. In a depleted N-MOS transistor, because a fixed N-type silicon channel is formed between the source and drain, the transistor is conductive under normal conditions. The current only stops when a negative voltage is applied to the gate, because the conductive electrons in the channel are driven away by the negative voltage.
Working principle:
If a voltage VGS is applied between the gate and base, the positive electric field of the gate will attract a large number of electrons to form an N-type electron channel, causing the source and sink to be in a resistive state. Therefore, the higher the gate voltage, the lower the impedance of the N-channel.DSThe greater the current.
Symbol:
Structural diagram:
PMOS
The source and drain of two P-type silicon transistors are first fabricated on an N-type substrate, then a layer of silicon dioxide is added for insulation, and a metal electrode is added above the channel between the source and drain as the gate. In an enhancement-type P-MOS transistor, the negative voltage applied to the drain attracts the holes in the source. Since the holes cannot pass through the N-type channel, no current is generated. However, when a negative voltage is applied to the gate, the electric field of the gate attracts the holes in the channel, creating a hole layer on top of the channel. Thus, hole current flows from the source to the drain. In a depletion-type P-MOS transistor, because a fixed P-type silicon channel is formed between the source and drain, the transistor is conducting under normal conditions. The current only stops when a positive voltage is applied to the gate, because at this time the conducting holes in the channel are driven away by the positive voltage.
Working principle:
If a voltage VGS is applied between the gate and base, the negative electric field of the gate will repel a large number of electrons, forming a P-type electron channel, causing the source and sink to be in a resistive impedance state. Therefore, the higher the gate voltage, the lower the impedance of the P-channel, and the larger the IDS current.
Symbol:
Structural diagram:
NMOS Example
In the circuit driving the fan, the higher the voltage of VFAN, the higher the voltage of Q22 (VGS), the lower the impedance of the N-channel, and the greater the current flowing through it. Since Q = I × t = C × V, the greater the current, the higher the voltage, and the faster the fan spins.
Therefore, for the MOSFET to be fully turned on, the VG of Q22 must be greater than 1.5 times VS and VD, which is greater than 7.5V. In EW5, we set it to 7.6V (VFAN = 3.3V).
AND
Definition: When both inputs are 1, the output is 1.
Equivalent circuit:
Symbol:
Truth table:
OR
Definition: When either of the two input terminals is 1, the output is 1.
Equivalent circuit:
Symbol:
Truth table:
NOT
Definition: A reverse gate has only one input and one output. When the input is 1, its output is 0; conversely, when the input is 0, its output is 1.。
Equivalent circuit:
Symbol:
Truth table:
Other designs
Open Collector refers to removing the trace above the collector of a TTL output transistor, while Open Drain refers to removing the trace above the drain of a CMOS output MOSFET. This can be used when the output needs to drive a large current or when all outputs are connected together to form a wired AND gate.。
D1 and D2 on the line have the following protective functions:
Prevent negative voltage input
Prevent overvoltage input
Preventing Floating Oscillation
Preventing ESD electrostatic discharge
Schottky TTL
In TTL logic circuits，Transistors all operate in the cutoff and saturation regions.，When the transistor transitions from the saturation region to the cutoff region，Due to excess charge on the base，Causes storage time delay，This limits the circuit's transition time.
Therefore, we add a Schottky diode to both the collector and base of the transistor. The Schottky diode has a low forward voltage characteristic, approximately 0.25V. When the transistor is about to saturate, the 0.25V conduction of the Schottky diode short-circuits the excess charge on the base, preventing it from accumulating there and thus speeding up the switching time.
Three-state gate
It is a digital circuit used to represent three states. Two of these states are equivalent to logic 1 and 0, much like a traditional logic gate. The third state is high impedance. The high impedance state is like an open circuit, meaning the output appears disconnected and the circuit has no logical meaning.
Equivalent circuit:
Symbol:
Truth table:
Transmission gate
Essentially, it is an electronic switch controlled by an input logic potential. When manufactured using CMOS technology, it is used to simplify the structure of different digital components.
Equivalent circuit:
Symbol:
Truth table:
Schmidt gate
Schmitt triggers have waveform straightening capabilities and exhibit hysteresis, allowing for a wider noise range.
Encoder and decoder
An encoder has m input terminals, at most one logic circuit is activated at a time, and a corresponding n-bit code is output from the output terminal. For example, the keyboard matrix of a KBC.
Decoder - Converts an n-bit input code into m outputs. At most one output is activated at a time.
Multiplexer and Demultiplexer
Multiplexer - Selectively sends many different input signals to one or a group of receivers.
For example: MCU's alternate function
As shown in the diagram, multiplexers MUX1, MUX2, and MUX3 select the function path via the Alternate function. Therefore, we set the Alternate Register to High or Low to select the EC pin as I/O or PWM, etc.
As shown in the diagram, the working path of PxDIN is through MUX3, while the working path of PxDOUT is through MUX2. Therefore, when EC alternate is set to GPIO, it can be used as either an input or an output.
Demultiplexer - Selects one set of input signals from a set of input signals as the output.
Flip-Flop
It is a basic element used to store one bit of binary information. Generally, a flip-flop has one or two input terminals, two output terminals, and several control signals. The two outputs of the flip-flop are always complementary to each other, hence it is also called a bistable multivibrator. The output of the flip-flop is determined by the input, the control signal, and the previous state. As long as the power supply to the circuit is continuous, it will maintain a certain state until the input signal changes.
R-S flip-flop
Circuit:
RS trigger:
Truth table:
The logic symbol and truth table of the RS flip-flop are as follows:
S: PRESET (Preset) When the input is high, the output Q will be preset to a high level.
R: RESET (clear) When the input is high, the output Q is cleared to a low level.
When the CK (clock) input is positive edge excitation, the output Q value is determined by the input signal (R,S) value.
When the input (R,S) = (1,1) of the RS flip-flop is set, a race condition will occur, making it impossible to determine the output Q value.
D flip-flop
The logic symbol and truth table of the D flip-flop are shown in the figure below. The function of the D flip-flop is the same as connecting the input signals R and S of the RS flip-flop together.
Circuit:
D flip-flop [latch]:
Truth table:
J-K flip-flop
The logic symbol and truth table of the JK flip-flop are shown in the figure below. The JK flip-flop is an improvement on the RS flip-flop for the race condition. The improved output is the complement of the previous state (Qn), which is the only difference between it and the RS flip-flop.
Circuit:
JK trigger:
Truth table:
T flip-flop
The logic symbol and truth table of the T flip-flop are shown in the figure below. Its function is the same as connecting the input signals J and K of the JK flip-flop together.
Circuit:
T-flip-flop:
Truth table:
Oscillators and Countersoscillator
A bistable oscillator – the output level will stabilize if it is not 0 or 1. Example: a flip-flop.
Astable oscillator – with two output states It can use 0 and 1, but it won't reach a steady state. Example: Square wave signal generator.
A monostable oscillator is normally in a stable state, but when triggered, it enters an unstable state, and then returns to a stable state after a period of time. Example: a remote control.
Counter - Used to calculate the number of pulses received within a certain time period.
temporary register
Definition: A flip-flop with data storage capability. It can be divided into:
Serial shift register: Data is input into the register one bit at a time. Examples: EC SMBus Data Register / EC Tx/Rx Register
Parallel shift register: Moves all data into the register simultaneously. For example, when reading the BIOS ROM.
Memory Mapped I/O v.s Port Mapped I/O
Memory-mapped I/O and port-mapped I/O are methods used by processors to handle memory and I/O.
Memory-mapped I/O: The processor does not specifically distinguish between memory and I/O addresses. When the processor accesses I/O, it does so just like accessing memory, so it uses the same instructions to access both memory and I/O. Example: NS97551
Port-mapped I/O: The processor distinguishes between memory and I/O addresses (0x0000-0xFFFF). When the processor accesses I/O, only the lowest address in the 0x0000-0xFFFF range is mapped to the I/O address. Therefore, different instructions are used to access memory and I/O. Example: Intel CPU
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