nuvoton - ADC Converter

EADC converter 的特性

• 12 bits SAR ADC
• Operation voltage
• AVDD : 2.5V - 5.5V
• VREF : 2.5V - AVDD
• VIN : 0 - VREF
• External Input channel
• 16 single-end analog input channels
• 8 pairs of differential analog input channels 
• Internal Input Channel
• Band-gap voltage (VBG)
• Temperature sensor (VTEMP)
• Battery power (VBAT)
• 19 sample modules
• ADC channel 愈低的愈優先
• Channel 0 - channel 15 可以設定 ADC 模組,採樣時序和觸發來源.
• Channel 16 - band-gap voltage
• Channel 17 - temperature sensor
• Channel 18 - battery power (VBAT)
• An A/D conversion 啟動條件
• SWTRGn (EADC_SWTRG[n], n=0..18) = 1
• External pin STADC
• Timer [3:0] overflow pulse triggers
• ADINT[1:0] interrupt EOC (End of conversion) pulse triggers
• PWM triggers
• Support PDMA transfer

EADC clock source

• EADC clock = HCLK / (EADCDIV+1) 
• up to 21MHz
• EADCDIV is 8-bit prescaler

EADC Block Diagram

ADC Sample Module

ADC controller 擁有 19 個 A/D sample module, 每個 A/D sample module 包含 19 trigger source. 其中 A/D sample module [3:0] 擁有 double data register, A/D sample module [18:16] 用來偵測內部的電壓 VBG, VTEMP, VBAT.

19 trigger source

• External pin STADC
• Timer[3:0]
• ADINT[1:0]
• PWM0TG[5:0]
• PWM1TG[5:0]

ADC Sample Timing

• Internal sampling time < 7 ADC clocks
• External sampling time 0-255 ADC clocks (> 5*RC)
• Interrupt Flag Position Selection (INTPOS) when ADC sample complete.
• ADC module 由 idle 到 sampling 需要 1 個 ADC clock, 當 ADC conversion start.

Digital Comparator (4 set)

• 在 ADC sample module 轉換完成之後,就會啟動比較的功能.
• 比較 ADC sample result 和程式定義的數值 CMPD(EADC_CMPn[27:16])
• 支援值域區間比較的功能

ADC Interrupt (4 set)

• EOC (End of conversion) - ADC sample module 轉換完成.
• ADCMPFn - Condition match monitored by ADC digital comparactor 

Double Buffer Mode

• DBMEN (EADC_SCTLn[23]) = 1.
• First A/D convert finish
• VALID (EADC_DATn[17]) = 1
• STATUS (EADC_STATUS0[n]) = 0
• After first A/D convert finish
• VALID (EADC_DATn[17]) = 1
• STATUS (EADC_STATUS0[n]) = 1

因此, 建議在 STATUS 和 VALID 都轉為 1 之後,再讀取 A/D 轉換的值.

ADC sample code

• Enable clock for ADC module

CLK_EnableModuleClock(EADC_MODULE);

• Select clock source for ADC module

CLK_SetModuleClock(EADC_MODULE, 0, CLK_CLKDIV0_EADC(8));

• Initialize ADC module

// Set the ADC internal sampling time, input mode as single-end and  
// enable the A/D converter 
EADC_Open(EADC, EADC_CTL_DIFFEN_SINGLE_END);
EADC_SetInternalSampleTime(EADC, 6);
// Configure the sample module 0 for analog input channel 6 and 
// software trigger source.
EADC_ConfigSampleModule(EADC, 0, EADC_SOFTWARE_TRIGGER, 6);

• Enable interrupt for ADC module

//Enable sample module 0 interrupt.
EADC_ENABLE_SAMPLE_MODULE_INT(EADC, 0, 0x1);
/* Clear the A/D ADINT0 interrupt flag for safe */
EADC_CLR_INT_FLAG(EADC, 0x1);
/* Enable the sample module 0 interrupt.  */
EADC_ENABLE_INT(EADC, 0x1);//Enable sample module A/D ADINT0 interrupt.

• 啟動 ADC module 轉換 

/* Trigger sample module 0 to start A/D conversion */
EADC_START_CONV(EADC, 0x1);

• 讀取 ADC module Value

uint32_t adcValue; 
adcValue = Get_ADC_Knob();
printf("[ADC]: The ADC value is %d\n",adcValue );

範例程式 :

在 FreeRTOS 中，加入一個定時啟動的 Task．在 Task 的初始化時，同時初始化 ADC，在定時啟動的部分，啟動 ADC 轉換功能，等一段時間，再取回 ADC 的值。

範例程式位於 Github 的 nuvotoon-M451-Sample 的 FreeRTOS-EADC-Sample branch

Reference document :

• nuvoton NuMicro-M451-Series-Training-Material
• nuvoton TRM_M451_Series_EN_Rev2.08